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The degradation of the copper oxide passivated copper line prepared from a room temperature plasma-based etch process under the electromigration condition has been studied. The copper line surface was oxidized into the copper oxide layer in a parallel-plate plasma reactor operated under the plasma etching or reactive ion etching mode. The surface roughness of the oxide is contributed by the high ion bombardment energy. The lifetime of the sample was shortened by the addition of the oxide passivation layer. It was also decreased with the increase of the stress current density. The sample with the thin bulk copper layer is more resistant to the thermal stress than that with the thick bulk copper layer, which delayed the voids formation in the line breakage process.more » « less
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The reliability of the plasma etched copper lines with the self-aligned copper oxide passivation layer has been studied with the electromigration stress method. The oxide passivation layer was prepared by plasma oxidation, which covers the entire exposed copper line to prevent the surface oxidation under the ambient condition. The void formation and growth process reflect the line broken mechanism. Voids formed from grain boundary depletion and grain thinning were monitored by optical microscopes. The line failure times with respect to line width and current density were measured. The addition of the oxide passivation layer shortened the lifetime due to the poor heat transfer and copper diffusion, which accelerated the formation and growth of the voids. The narrow line has a longer lifetime than the wide line because of the fewer grain boundaries for flux divergence to form voids. The copper oxide passivation layer was formed self-aligned to the copper line. It also gettered copper atoms diffused from the bulk copper film.more » « less
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This paper proposes a differential burn-in policy that considers the spatial nonhomogeneous distribution of defects in semiconductor manufacturing. Due to the nonhomogeneous distribution of spatial defects, devices at different locations on a semiconductor wafer may exhibit different probabilities of being defective. Unlike conventional burn-in policies, which subject all devices to the same burn-in test, the differential burn-in policy can take different actions for different devices, i.e., acceptance without burn-in, rejection without burn-in, or burn-in with a certain duration. A mixed integer nonlinear programming model is developed to find the cost-optimal decisions. A numerical example is used to demonstrate the potential application of the proposed burn-in policy.more » « less
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